1. Technical Field
Embodiments of the present disclosure relate to methods of fabricating a semiconductor device, and more particularly, to methods of fabricating a semiconductor device having an array of fine patterns and semiconductor devices fabricated thereby.
2. Related Art
In fabrication of electronic devices such as semiconductor devices, many efforts have been focused to integrate more patterns in a limited area of a semiconductor substrate. That is, attempts to increase the integration density of the electronic devices or the semiconductor devices have typically resulted in formation of fine patterns. Various techniques have been proposed to form the fine patterns such as small contact holes having a nano-scaled critical dimension (CD), for example, a size of about a few nanometers to about several tens of nanometers.
In the event that the fine patterns of the semiconductor devices are formed using only a photolithography process, there may be some limitations in forming the fine patterns due to image resolution limits of lithography apparatuses used in the photolithography process. Methods of forming the fine patterns using a self-assembly of polymer molecules may be considered as an alternative for overcoming the image resolution limits of optical systems used in the photolithography process and for avoiding constraints arising from wavelengths of lights generated from light sources of optical systems used in the photolithography process. However, the methods of forming the fine patterns using the self-assembly technique are still under development. Thus, there may be still some difficulties in forming the fine patterns of highly integrated semiconductor devices using the self-assembly technique.